CPS/MXWK_美芯微科/common/reg_def/trim_define.h

#ifndef __TRIM_DEFINE_H__
#define __TRIM_DEFINE_H__
//-----------------------------------------------------------------------------
// trim registers definition                            
//-----------------------------------------------------------------------------
#pragma anon_unions

//-----------------------------------------------------------------------------
// registers structures
typedef struct
{
	//bg temperature drift trim
	uint32_t prebg_temp:6;
	uint32_t reserved_7_6:2;
	//trim ref voltage
	uint32_t bg:6;
	uint32_t reserved_15_14:2;
	//trim bg ibias
	uint32_t ibias:5;
	//0: acdc+dcdc,d2a_fb1_fbmode=0,d2a_fb2_fbmode=1,d2a_fb1_cv_en=0,d2a_fb2_cv_en=1;
	//1:acdc+dcdc*2,d2a_fb1_fbmode=1,d2a_fb2_fbmode=1,d2a_fb1_cv_en=1,d2a_fb2_cv_en=1;
	//
	uint32_t sel_opto_fb:1;
	uint32_t reserved_24_22:3;
	//cc ibias1 trim
	//00:z
	//01:80ua
	//10:180ua
	//11:330ua
	uint32_t cc_ibias1:3;
	//cc ibias2 trim
	//00:z
	//01:80ua
	//10:180ua
	//11:330ua
	uint32_t cc_ibias2:3;
	uint32_t reserved_31_31:1;
} REG_trim_ref_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_ref_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_ref_TypeDef;

typedef struct
{
	//osc24m trim
	uint32_t value:7;
	uint32_t reserved_31_7:25;
} REG_trim_ref_osc24m_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_ref_osc24m_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_ref_osc24m_TypeDef;

typedef struct
{
	//
	uint32_t oc:3;
	//
	uint32_t res:1;
	uint32_t reserved_31_4:28;
} REG_trim_vbus1_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_vbus1_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_vbus1_TypeDef;

typedef struct
{
	//
	uint32_t oc:3;
	//
	uint32_t res:1;
	uint32_t reserved_31_4:28;
} REG_trim_vbus2_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_vbus2_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_vbus2_TypeDef;

typedef struct
{
	//for analog trim rsvd
	uint32_t trim:8;
	uint32_t reserved_31_8:24;
} REG_trim_rsvd_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_rsvd_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_rsvd_TypeDef;

typedef struct
{
	//
	uint32_t vds_vref:3;
	uint32_t reserved_31_3:29;
} REG_trim_lds_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_lds_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_lds_TypeDef;

typedef struct
{
	//trim pull-high resistance for apple mode
	uint32_t rh_am:3;
	uint32_t reserved_31_3:29;
} REG_trim_dpdn1_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_dpdn1_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_dpdn1_TypeDef;

typedef struct
{
	//trim pull-high resistance for apple mode
	uint32_t rh_am:3;
	uint32_t reserved_31_3:29;
} REG_trim_dpdn2_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_dpdn2_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_dpdn2_TypeDef;

typedef struct
{
	//trim gm fbcc
	uint32_t cc:4;
	//trim gm fbcv
	uint32_t cv:4;
	//trim gm comp
	uint32_t comp:4;
	uint32_t reserved_31_12:20;
} REG_trim_fb1_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_fb1_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_fb1_TypeDef;

typedef struct
{
	//trim gm fbcc
	uint32_t cc:4;
	//trim gm fbcv
	uint32_t cv:4;
	//trim gm comp
	uint32_t comp:4;
	uint32_t reserved_31_12:20;
} REG_trim_fb2_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_fb2_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_fb2_TypeDef;

typedef struct
{
	//
	uint32_t pucur:3;
	uint32_t reserved_31_3:29;
} REG_trim_ibias4_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_ibias4_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_ibias4_TypeDef;

typedef struct
{
	//
	uint32_t pucur:4;
	uint32_t reserved_31_4:28;
} REG_trim_io12_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_io12_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_io12_TypeDef;

typedef struct
{
	//pd trim register
	uint32_t trans:1;
	uint32_t reserved_31_1:31;
} REG_trim_t_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_t_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_t_TypeDef;

typedef struct
{
	//
	uint32_t hs_res:4;
	uint32_t reserved_6_4:3;
	//
	uint32_t ls_res:4;
	uint32_t reserved_31_11:21;
} REG_trim_vd_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_vd_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_vd_TypeDef;

typedef struct
{
	//0:enable crc
	uint32_t rom_crc_dis:1;
	uint32_t reserved_31_1:31;
} REG_trim_trm_bitfiled_TypeDef;

typedef struct
{
	union {
	__IO	REG_trim_trm_bitfiled_TypeDef bf;//bitfiled
	__IO	uint32_t word;
	};
} REG_trim_trm_TypeDef;

//-----------------------------------------------------------------------------
// memory map
#define REG_TRIM_REF_BASE                                                      0x4000F000
#define REG_TRIM_REF_OSC24M_BASE                                               0x4000F004
#define REG_TRIM_VBUS1_BASE                                                    0x4000F008
#define REG_TRIM_VBUS2_BASE                                                    0x4000F00C
#define REG_TRIM_RSVD_BASE                                                     0x4000F010
#define REG_TRIM_LDS_BASE                                                      0x4000F014
#define REG_TRIM_DPDN1_BASE                                                    0x4000F018
#define REG_TRIM_DPDN2_BASE                                                    0x4000F01C
#define REG_TRIM_FB1_BASE                                                      0x4000F020
#define REG_TRIM_FB2_BASE                                                      0x4000F024
#define REG_TRIM_IBIAS4_BASE                                                   0x4000F028
#define REG_TRIM_IO12_BASE                                                     0x4000F02C
#define REG_TRIM_T_BASE                                                        0x4000F030
#define REG_TRIM_VD_BASE                                                       0x4000F034
#define REG_TRIM_TRM_BASE                                                      0x4000F038
//-----------------------------------------------------------------------------
// declaration
#define REG_TRIM_REF                             ((REG_trim_ref_TypeDef                   *) REG_TRIM_REF_BASE                        )
#define REG_TRIM_REF_OSC24M                      ((REG_trim_ref_osc24m_TypeDef            *) REG_TRIM_REF_OSC24M_BASE                 )
#define REG_TRIM_VBUS1                           ((REG_trim_vbus1_TypeDef                 *) REG_TRIM_VBUS1_BASE                      )
#define REG_TRIM_VBUS2                           ((REG_trim_vbus2_TypeDef                 *) REG_TRIM_VBUS2_BASE                      )
#define REG_TRIM_RSVD                            ((REG_trim_rsvd_TypeDef                  *) REG_TRIM_RSVD_BASE                       )
#define REG_TRIM_LDS                             ((REG_trim_lds_TypeDef                   *) REG_TRIM_LDS_BASE                        )
#define REG_TRIM_DPDN1                           ((REG_trim_dpdn1_TypeDef                 *) REG_TRIM_DPDN1_BASE                      )
#define REG_TRIM_DPDN2                           ((REG_trim_dpdn2_TypeDef                 *) REG_TRIM_DPDN2_BASE                      )
#define REG_TRIM_FB1                             ((REG_trim_fb1_TypeDef                   *) REG_TRIM_FB1_BASE                        )
#define REG_TRIM_FB2                             ((REG_trim_fb2_TypeDef                   *) REG_TRIM_FB2_BASE                        )
#define REG_TRIM_IBIAS4                          ((REG_trim_ibias4_TypeDef                *) REG_TRIM_IBIAS4_BASE                     )
#define REG_TRIM_IO12                            ((REG_trim_io12_TypeDef                  *) REG_TRIM_IO12_BASE                       )
#define REG_TRIM_T                               ((REG_trim_t_TypeDef                     *) REG_TRIM_T_BASE                          )
#define REG_TRIM_VD                              ((REG_trim_vd_TypeDef                    *) REG_TRIM_VD_BASE                         )
#define REG_TRIM_TRM                             ((REG_trim_trm_TypeDef                   *) REG_TRIM_TRM_BASE                        )
//-----------------------------------------------------------------------------
// set 
#define REG_TRIM_REF_PREBG_TEMP_POS                         0
#define REG_TRIM_REF_PREBG_TEMP_MSK                        (0x3Ful << REG_TRIM_REF_PREBG_TEMP_POS)
#define REG_TRIM_REF_PREBG_TEMP_SET(num)                   (((num) << REG_TRIM_REF_PREBG_TEMP_POS                       ) & REG_TRIM_REF_PREBG_TEMP_MSK)

#define REG_TRIM_REF_BG_POS                                 8
#define REG_TRIM_REF_BG_MSK                                (0x3Ful << REG_TRIM_REF_BG_POS)
#define REG_TRIM_REF_BG_SET(num)                           (((num) << REG_TRIM_REF_BG_POS                               ) & REG_TRIM_REF_BG_MSK)

#define REG_TRIM_REF_IBIAS_POS                             16
#define REG_TRIM_REF_IBIAS_MSK                             (0x1Ful << REG_TRIM_REF_IBIAS_POS)
#define REG_TRIM_REF_IBIAS_SET(num)                        (((num) << REG_TRIM_REF_IBIAS_POS                            ) & REG_TRIM_REF_IBIAS_MSK)

#define REG_TRIM_REF_SEL_OPTO_FB_POS                       21
#define REG_TRIM_REF_SEL_OPTO_FB_MSK                       (0x1ul << REG_TRIM_REF_SEL_OPTO_FB_POS)
#define REG_TRIM_REF_SEL_OPTO_FB_SET(num)                  (((num) << REG_TRIM_REF_SEL_OPTO_FB_POS                      ) & REG_TRIM_REF_SEL_OPTO_FB_MSK)

#define REG_TRIM_REF_CC_IBIAS1_POS                         25
#define REG_TRIM_REF_CC_IBIAS1_MSK                         (0x7ul << REG_TRIM_REF_CC_IBIAS1_POS)
#define REG_TRIM_REF_CC_IBIAS1_SET(num)                    (((num) << REG_TRIM_REF_CC_IBIAS1_POS                        ) & REG_TRIM_REF_CC_IBIAS1_MSK)

#define REG_TRIM_REF_CC_IBIAS2_POS                         28
#define REG_TRIM_REF_CC_IBIAS2_MSK                         (0x7ul << REG_TRIM_REF_CC_IBIAS2_POS)
#define REG_TRIM_REF_CC_IBIAS2_SET(num)                    (((num) << REG_TRIM_REF_CC_IBIAS2_POS                        ) & REG_TRIM_REF_CC_IBIAS2_MSK)

#define REG_TRIM_REF_OSC24M_POS                             0
#define REG_TRIM_REF_OSC24M_MSK                            (0x7Ful << REG_TRIM_REF_OSC24M_POS)
#define REG_TRIM_REF_OSC24M_SET(num)                       (((num) << REG_TRIM_REF_OSC24M_POS                           ) & REG_TRIM_REF_OSC24M_MSK)

#define REG_TRIM_VBUS1_OC_POS                               0
#define REG_TRIM_VBUS1_OC_MSK                              (0x7ul << REG_TRIM_VBUS1_OC_POS)
#define REG_TRIM_VBUS1_OC_SET(num)                         (((num) << REG_TRIM_VBUS1_OC_POS                             ) & REG_TRIM_VBUS1_OC_MSK)

#define REG_TRIM_VBUS1_RES_POS                              3
#define REG_TRIM_VBUS1_RES_MSK                             (0x1ul << REG_TRIM_VBUS1_RES_POS)
#define REG_TRIM_VBUS1_RES_SET(num)                        (((num) << REG_TRIM_VBUS1_RES_POS                            ) & REG_TRIM_VBUS1_RES_MSK)

#define REG_TRIM_VBUS2_OC_POS                               0
#define REG_TRIM_VBUS2_OC_MSK                              (0x7ul << REG_TRIM_VBUS2_OC_POS)
#define REG_TRIM_VBUS2_OC_SET(num)                         (((num) << REG_TRIM_VBUS2_OC_POS                             ) & REG_TRIM_VBUS2_OC_MSK)

#define REG_TRIM_VBUS2_RES_POS                              3
#define REG_TRIM_VBUS2_RES_MSK                             (0x1ul << REG_TRIM_VBUS2_RES_POS)
#define REG_TRIM_VBUS2_RES_SET(num)                        (((num) << REG_TRIM_VBUS2_RES_POS                            ) & REG_TRIM_VBUS2_RES_MSK)

#define REG_TRIM_RSVD_TRIM_POS                              0
#define REG_TRIM_RSVD_TRIM_MSK                             (0xFFul << REG_TRIM_RSVD_TRIM_POS)
#define REG_TRIM_RSVD_TRIM_SET(num)                        (((num) << REG_TRIM_RSVD_TRIM_POS                            ) & REG_TRIM_RSVD_TRIM_MSK)

#define REG_TRIM_LDS_VDS_VREF_POS                           0
#define REG_TRIM_LDS_VDS_VREF_MSK                          (0x7ul << REG_TRIM_LDS_VDS_VREF_POS)
#define REG_TRIM_LDS_VDS_VREF_SET(num)                     (((num) << REG_TRIM_LDS_VDS_VREF_POS                         ) & REG_TRIM_LDS_VDS_VREF_MSK)

#define REG_TRIM_DPDN1_RH_AM_POS                            0
#define REG_TRIM_DPDN1_RH_AM_MSK                           (0x7ul << REG_TRIM_DPDN1_RH_AM_POS)
#define REG_TRIM_DPDN1_RH_AM_SET(num)                      (((num) << REG_TRIM_DPDN1_RH_AM_POS                          ) & REG_TRIM_DPDN1_RH_AM_MSK)

#define REG_TRIM_DPDN2_RH_AM_POS                            0
#define REG_TRIM_DPDN2_RH_AM_MSK                           (0x7ul << REG_TRIM_DPDN2_RH_AM_POS)
#define REG_TRIM_DPDN2_RH_AM_SET(num)                      (((num) << REG_TRIM_DPDN2_RH_AM_POS                          ) & REG_TRIM_DPDN2_RH_AM_MSK)

#define REG_TRIM_FB1_CC_POS                                 0
#define REG_TRIM_FB1_CC_MSK                                (0xFul << REG_TRIM_FB1_CC_POS)
#define REG_TRIM_FB1_CC_SET(num)                           (((num) << REG_TRIM_FB1_CC_POS                               ) & REG_TRIM_FB1_CC_MSK)

#define REG_TRIM_FB1_CV_POS                                 4
#define REG_TRIM_FB1_CV_MSK                                (0xFul << REG_TRIM_FB1_CV_POS)
#define REG_TRIM_FB1_CV_SET(num)                           (((num) << REG_TRIM_FB1_CV_POS                               ) & REG_TRIM_FB1_CV_MSK)

#define REG_TRIM_FB1_COMP_POS                               8
#define REG_TRIM_FB1_COMP_MSK                              (0xFul << REG_TRIM_FB1_COMP_POS)
#define REG_TRIM_FB1_COMP_SET(num)                         (((num) << REG_TRIM_FB1_COMP_POS                             ) & REG_TRIM_FB1_COMP_MSK)

#define REG_TRIM_FB2_CC_POS                                 0
#define REG_TRIM_FB2_CC_MSK                                (0xFul << REG_TRIM_FB2_CC_POS)
#define REG_TRIM_FB2_CC_SET(num)                           (((num) << REG_TRIM_FB2_CC_POS                               ) & REG_TRIM_FB2_CC_MSK)

#define REG_TRIM_FB2_CV_POS                                 4
#define REG_TRIM_FB2_CV_MSK                                (0xFul << REG_TRIM_FB2_CV_POS)
#define REG_TRIM_FB2_CV_SET(num)                           (((num) << REG_TRIM_FB2_CV_POS                               ) & REG_TRIM_FB2_CV_MSK)

#define REG_TRIM_FB2_COMP_POS                               8
#define REG_TRIM_FB2_COMP_MSK                              (0xFul << REG_TRIM_FB2_COMP_POS)
#define REG_TRIM_FB2_COMP_SET(num)                         (((num) << REG_TRIM_FB2_COMP_POS                             ) & REG_TRIM_FB2_COMP_MSK)

#define REG_TRIM_IBIAS4_PUCUR_POS                           0
#define REG_TRIM_IBIAS4_PUCUR_MSK                          (0x7ul << REG_TRIM_IBIAS4_PUCUR_POS)
#define REG_TRIM_IBIAS4_PUCUR_SET(num)                     (((num) << REG_TRIM_IBIAS4_PUCUR_POS                         ) & REG_TRIM_IBIAS4_PUCUR_MSK)

#define REG_TRIM_IO12_PUCUR_POS                             0
#define REG_TRIM_IO12_PUCUR_MSK                            (0xFul << REG_TRIM_IO12_PUCUR_POS)
#define REG_TRIM_IO12_PUCUR_SET(num)                       (((num) << REG_TRIM_IO12_PUCUR_POS                           ) & REG_TRIM_IO12_PUCUR_MSK)

#define REG_TRIM_T_TRANS_POS                                0
#define REG_TRIM_T_TRANS_MSK                               (0x1ul << REG_TRIM_T_TRANS_POS)
#define REG_TRIM_T_TRANS_SET(num)                          (((num) << REG_TRIM_T_TRANS_POS                              ) & REG_TRIM_T_TRANS_MSK)

#define REG_TRIM_VD_HS_RES_POS                              0
#define REG_TRIM_VD_HS_RES_MSK                             (0xFul << REG_TRIM_VD_HS_RES_POS)
#define REG_TRIM_VD_HS_RES_SET(num)                        (((num) << REG_TRIM_VD_HS_RES_POS                            ) & REG_TRIM_VD_HS_RES_MSK)

#define REG_TRIM_VD_LS_RES_POS                              7
#define REG_TRIM_VD_LS_RES_MSK                             (0xFul << REG_TRIM_VD_LS_RES_POS)
#define REG_TRIM_VD_LS_RES_SET(num)                        (((num) << REG_TRIM_VD_LS_RES_POS                            ) & REG_TRIM_VD_LS_RES_MSK)

#define REG_TRIM_TRM_ROM_CRC_DIS_POS                        0
#define REG_TRIM_TRM_ROM_CRC_DIS_MSK                       (0x1ul << REG_TRIM_TRM_ROM_CRC_DIS_POS)
#define REG_TRIM_TRM_ROM_CRC_DIS_SET(num)                  (((num) << REG_TRIM_TRM_ROM_CRC_DIS_POS                      ) & REG_TRIM_TRM_ROM_CRC_DIS_MSK)

#endif /*__TRIM_DEFINE_H__*/