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73 lines
2.0 KiB
73 lines
2.0 KiB
4 months ago
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/**
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******************************************************************************
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* @copyright Copyright (C), 2016-2022, ConvenientPower. Co., Ltd.
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* @file ufcs_flag.h
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* @version 1.0
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* @author qing.cheng
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* @date 2022-12-02
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* @brief Header file of UFCS_FLAG_H module.
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******************************************************************************
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*/
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#ifndef _UFCS_FLAG_H_
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#define _UFCS_FLAG_H_
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#include "core_comm.h"
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#include "drv_comm.h"
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//#define ENABLE_UFCS_IRQ() \
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// do{\
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// NVIC_EnableIRQ(UFCS_TX_IRQn);\
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// NVIC_EnableIRQ(UFCS_RX_IRQn);\
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// }while(0)
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//#define DISABLE_UFCS_IRQ() \
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// do{\
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// NVIC_DisableIRQ(UFCS_TX_IRQn);\
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// NVIC_DisableIRQ(UFCS_RX_IRQn);\
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// }while(0)
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#define ENABLE_UFCS_IRQ() //__enable_irq()
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#define DISABLE_UFCS_IRQ() //__disable_irq()
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#define __UFCS_SET_FLAG(val, mask) \
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do \
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{ \
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(val) |= (mask); \
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} while (0)
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#define __UFCS_CLR_FLAG(val, mask) \
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do \
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{ \
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(val) &= ~(mask); \
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} while (0)
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#define UFCS_FLAG(val, mask) (!!((val) & (mask)))
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#define UFCS_SET_FLAG(val, mask) \
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do \
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{ \
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DISABLE_UFCS_IRQ(); \
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__UFCS_SET_FLAG(val, mask); \
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ENABLE_UFCS_IRQ(); \
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} while (0)
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#define UFCS_CLR_FLAG(val, mask) \
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do \
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{ \
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DISABLE_UFCS_IRQ(); \
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__UFCS_CLR_FLAG(val, mask);\
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ENABLE_UFCS_IRQ(); \
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} while(0)
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#define PRL_HARDRESET_RECIVED_FROM_PHY BIT_SET(0)
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#define PRL_PACKET_RECIVED_FROM_PHY BIT_SET(1)
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#define PRL_PACKET_SENT_SUCC_FROM_PHY BIT_SET(2)
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#define PRL_CABLE_HARDRESET_SUCESS_FROM_PHY BIT_SET(3)
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#define PRL_SNK_HARDRESET_SUCESS_FROM_PHY BIT_SET(4)
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#define PRL_RECIVED_MSG_ERROR_FROM_PHY BIT_SET(5)
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#define PRL_RECIVED_ERROR_FRAME_FROM_PHY BIT_SET(6)
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#define PRL_RECIVED_CRC_IS_OK_FROM_PHY BIT_SET(7)
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//#define PRL_RELAY_ANCK_START_FROM_PRL BIT_SET(8)
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#endif /* PD_FLAG_H */
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