#ifndef __I2C_DEFINE_H__ #define __I2C_DEFINE_H__ //----------------------------------------------------------------------------- // i2c registers definition //----------------------------------------------------------------------------- #pragma anon_unions //----------------------------------------------------------------------------- // registers structures typedef struct { uint32_t value:7; uint32_t reserved_31_7:25; } REG_i2c_addr_7bit_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_addr_7bit_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_addr_7bit_TypeDef; typedef struct { uint32_t value:1; uint32_t reserved_31_1:31; } REG_i2c_enable_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_enable_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_enable_TypeDef; typedef struct { uint32_t value:2; uint32_t reserved_31_2:30; } REG_i2c_wr_mode_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_wr_mode_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_wr_mode_TypeDef; typedef struct { uint32_t value:1; uint32_t reserved_31_1:31; } REG_i2c_16bit_mode_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_16bit_mode_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_16bit_mode_TypeDef; typedef struct { uint32_t value:16; uint32_t reserved_31_16:16; } REG_i2c_16bit_mode_addrh_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_16bit_mode_addrh_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_16bit_mode_addrh_TypeDef; typedef struct { uint32_t value:16; uint32_t reserved_31_16:16; } REG_i2c_16bit_mode_mask_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_16bit_mode_mask_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_16bit_mode_mask_TypeDef; typedef struct { uint32_t value:1; uint32_t reserved_31_1:31; } REG_i2c_16bit_mode_en_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_16bit_mode_en_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_16bit_mode_en_TypeDef; typedef struct { uint32_t value:10; uint32_t reserved_31_10:22; } REG_i2c_sda_timeout_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_sda_timeout_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_sda_timeout_TypeDef; typedef struct { uint32_t value:32; } REG_i2c_wr_addr_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_wr_addr_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_wr_addr_TypeDef; typedef struct { uint32_t value:32; } REG_i2c_rd_addr_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_rd_addr_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_rd_addr_TypeDef; typedef struct { uint32_t value:32; } REG_i2c_hwdata_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_hwdata_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_hwdata_TypeDef; typedef struct { uint32_t wr_en:1; uint32_t reserved_7_1:7; uint32_t rd_en:1; uint32_t reserved_15_9:7; uint32_t wr_flag:1; uint32_t reserved_23_17:7; uint32_t rd_flag:1; uint32_t reserved_31_25:7; } REG_i2c_int_ctrl_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_int_ctrl_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_int_ctrl_TypeDef; typedef struct { uint32_t value:1; uint32_t reserved_31_1:31; } REG_i2c_scl_sync_en_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_scl_sync_en_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_scl_sync_en_TypeDef; typedef struct { uint32_t value:1; uint32_t reserved_31_1:31; } REG_i2c_async_reg_wr_en_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_async_reg_wr_en_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_async_reg_wr_en_TypeDef; typedef struct { uint32_t value:1; uint32_t reserved_31_1:31; } REG_i2c_ahb_clk_force_bitfiled_TypeDef; typedef struct { union { __IO REG_i2c_ahb_clk_force_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_i2c_ahb_clk_force_TypeDef; //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // memory map #define REG_I2C_ADDR_7BIT_BASE 0X4000D000 #define REG_I2C_ENABLE_BASE 0X4000D004 #define REG_I2C_WR_MODE_BASE 0X4000D008 #define REG_I2C_16BIT_MODE_BASE 0X4000D00C #define REG_I2C_16BIT_MODE_ADDRH_BASE 0X4000D010 #define REG_I2C_16BIT_MODE_MASK_BASE 0X4000D014 #define REG_I2C_16BIT_MODE_EN_BASE 0X4000D018 #define REG_I2C_SDA_TIMEOUT_BASE 0X4000D01C #define REG_I2C_WR_ADDR_BASE 0X4000D020 #define REG_I2C_RD_ADDR_BASE 0X4000D024 #define REG_I2C_HWDATA_BASE 0X4000D028 #define REG_I2C_INT_CTRL_BASE 0X4000D02C #define REG_I2C_SCL_SYNC_EN_BASE 0X4000D030 #define REG_I2C_ASYNC_REG_WR_EN_BASE 0X4000D034 #define REG_I2C_AHB_CLK_FORCE_BASE 0X4000D038 //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // declaration #define REG_I2C_ADDR_7BIT ((REG_i2c_addr_7bit_TypeDef *) REG_I2C_ADDR_7BIT_BASE) #define REG_I2C_ENABLE ((REG_i2c_enable_TypeDef *) REG_I2C_ENABLE_BASE) #define REG_I2C_WR_MODE ((REG_i2c_wr_mode_TypeDef *) REG_I2C_WR_MODE_BASE) #define REG_I2C_16BIT_MODE ((REG_i2c_16bit_mode_TypeDef *) REG_I2C_16BIT_MODE_BASE) #define REG_I2C_16BIT_MODE_ADDRH ((REG_i2c_16bit_mode_addrh_TypeDef *) REG_I2C_16BIT_MODE_ADDRH_BASE) #define REG_I2C_16BIT_MODE_MASK ((REG_i2c_16bit_mode_mask_TypeDef *) REG_I2C_16BIT_MODE_MASK_BASE) #define REG_I2C_16BIT_MODE_EN ((REG_i2c_16bit_mode_en_TypeDef *) REG_I2C_16BIT_MODE_EN_BASE) #define REG_I2C_SDA_TIMEOUT ((REG_i2c_sda_timeout_TypeDef *) REG_I2C_SDA_TIMEOUT_BASE) #define REG_I2C_WR_ADDR ((REG_i2c_wr_addr_TypeDef *) REG_I2C_WR_ADDR_BASE) #define REG_I2C_RD_ADDR ((REG_i2c_rd_addr_TypeDef *) REG_I2C_RD_ADDR_BASE) #define REG_I2C_HWDATA ((REG_i2c_hwdata_TypeDef *) REG_I2C_HWDATA_BASE) #define REG_I2C_INT_CTRL ((REG_i2c_int_ctrl_TypeDef *) REG_I2C_INT_CTRL_BASE) #define REG_I2C_SCL_SYNC_EN ((REG_i2c_scl_sync_en_TypeDef *) REG_I2C_SCL_SYNC_EN_BASE) #define REG_I2C_ASYNC_REG_WR_EN ((REG_i2c_async_reg_wr_en_TypeDef *) REG_I2C_ASYNC_REG_WR_EN_BASE) #define REG_I2C_AHB_CLK_FORCE ((REG_i2c_ahb_clk_force_TypeDef *) REG_I2C_AHB_CLK_FORCE_BASE) //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // set #define REG_I2C_ENABLE_POS 0 #define REG_I2C_ENABLE_MSK (0x1ul << REG_I2C_ENABLE_POS) #define REG_I2C_ENABLE_SET(num) (((num) << REG_I2C_ENABLE_POS ) & REG_I2C_ENABLE_MSK) #define REG_I2C_WR_MODE_POS 0 #define REG_I2C_WR_MODE_MSK (0x2ul << REG_I2C_WR_MODE_POS) #define REG_I2C_WR_MODE_SET(num) (((num) << REG_I2C_WR_MODE_POS ) & REG_I2C_WR_MODE_MSK) #define REG_I2C_16BIT_MODE_POS 0 #define REG_I2C_16BIT_MODE_MSK (0x1ul << REG_I2C_16BIT_MODE_POS) #define REG_I2C_16BIT_MODE_SET(num) (((num) << REG_I2C_16BIT_MODE_POS ) & REG_I2C_16BIT_MODE_MSK) #define REG_I2C_16BIT_MODE_ADDRH_POS 0 #define REG_I2C_16BIT_MODE_ADDRH_MSK (0x10ul << REG_I2C_16BIT_MODE_ADDRH_POS) #define REG_I2C_16BIT_MODE_ADDRH_SET(num) (((num) << REG_I2C_16BIT_MODE_ADDRH_POS ) & REG_I2C_16BIT_MODE_ADDRH_MSK) #define REG_I2C_16BIT_MODE_MASK_POS 0 #define REG_I2C_16BIT_MODE_MASK_MSK (0x10ul << REG_I2C_16BIT_MODE_MASK_POS) #define REG_I2C_16BIT_MODE_MASK_SET(num) (((num) << REG_I2C_16BIT_MODE_MASK_POS ) & REG_I2C_16BIT_MODE_MASK_MSK) #define REG_I2C_SDA_TIMEOUT_POS 0 #define REG_I2C_SDA_TIMEOUT_MSK (0xaul << REG_I2C_SDA_TIMEOUT_POS) #define REG_I2C_SDA_TIMEOUT_SET(num) (((num) << REG_I2C_SDA_TIMEOUT_POS ) & REG_I2C_SDA_TIMEOUT_MSK) #define REG_I2C_INT_CTRL_WR_EN_POS 0 #define REG_I2C_INT_CTRL_WR_EN_MSK (0x1ul << REG_I2C_INT_CTRL_WR_EN_POS) #define REG_I2C_INT_CTRL_WR_EN_SET(num) (((num) << REG_I2C_INT_CTRL_WR_EN_POS ) & REG_I2C_INT_CTRL_WR_EN_MSK) #define REG_I2C_INT_CTRL_RD_EN_POS 8 #define REG_I2C_INT_CTRL_RD_EN_MSK (0x1ul << REG_I2C_INT_CTRL_RD_EN_POS) #define REG_I2C_INT_CTRL_RD_EN_SET(num) (((num) << REG_I2C_INT_CTRL_RD_EN_POS ) & REG_I2C_INT_CTRL_RD_EN_MSK) #define REG_I2C_SCL_SYNC_EN_POS 0 #define REG_I2C_SCL_SYNC_EN_MSK (0x1ul << REG_I2C_SCL_SYNC_EN_POS) #define REG_I2C_SCL_SYNC_EN_SET(num) (((num) << REG_I2C_SCL_SYNC_EN_POS ) & REG_I2C_SCL_SYNC_EN_MSK) #define REG_I2C_ASYNC_REG_WR_EN_POS 0 #define REG_I2C_ASYNC_REG_WR_EN_MSK (0x1ul << REG_I2C_ASYNC_REG_WR_EN_POS) #define REG_I2C_ASYNC_REG_WR_EN_SET(num) (((num) << REG_I2C_ASYNC_REG_WR_EN_POS ) & REG_I2C_ASYNC_REG_WR_EN_MSK) #define REG_I2C_AHB_CLK_FORCE_POS 0 #define REG_I2C_AHB_CLK_FORCE_MSK (0x1ul << REG_I2C_AHB_CLK_FORCE_POS) #define REG_I2C_AHB_CLK_FORCE_SET(num) (((num) << REG_I2C_AHB_CLK_FORCE_POS ) & REG_I2C_AHB_CLK_FORCE_MSK) //----------------------------------------------------------------------------- #endif /*__I2C_DEFINE_H__*/