#ifndef __OTP_DEFINE_H__ #define __OTP_DEFINE_H__ //----------------------------------------------------------------------------- // otp registers definition //----------------------------------------------------------------------------- #pragma anon_unions //----------------------------------------------------------------------------- // registers structures typedef struct { uint32_t en:1; uint32_t sel:1; uint32_t reserved_31_2:30; } REG_otp_test_mode_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_test_mode_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_test_mode_TypeDef; typedef struct { uint32_t tkh:3; uint32_t tkl:3; uint32_t reserved_7_6:2; uint32_t tas:3; uint32_t reserved_31_11:21; } REG_otp_read_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_read_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_read_TypeDef; typedef struct { uint32_t pce:1; uint32_t pdstb:1; uint32_t pprog:1; uint32_t pclk:1; uint32_t pwe:1; uint32_t reserved_7_5:3; uint32_t paio:3; uint32_t pa:12; uint32_t ptr:1; uint32_t pas:1; uint32_t reserved_31_25:7; } REG_otp_pin_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_pin_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_pin_TypeDef; typedef struct { uint32_t value:4; uint32_t reserved_31_4:28; } REG_otp_pin_ptm_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_pin_ptm_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_pin_ptm_TypeDef; typedef struct { uint32_t value:32; } REG_otp_pin_pdin_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_pin_pdin_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_pin_pdin_TypeDef; typedef struct { uint32_t value:32; } REG_otp_pin_pdout_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_pin_pdout_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_pin_pdout_TypeDef; typedef struct { uint32_t data:1; uint32_t reserved_31_1:31; } REG_otp_read_disable_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_read_disable_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_read_disable_TypeDef; typedef struct { uint32_t value:2; uint32_t reserved_31_2:30; } REG_otp_debug_sel_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_debug_sel_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_debug_sel_TypeDef; typedef struct { uint32_t rdy:1; uint32_t d2a_vdd2:1; uint32_t reserved_31_2:30; } REG_otp_status_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_status_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_status_TypeDef; typedef struct { uint32_t tcel:8; uint32_t tpens:8; uint32_t tash:4; uint32_t tvd2ens:4; uint32_t reserved_31_24:8; } REG_otp_timing1_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_timing1_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_timing1_TypeDef; typedef struct { uint32_t tsas:8; uint32_t tcs:8; uint32_t reserved_31_16:16; } REG_otp_timing2_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_timing2_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_timing2_TypeDef; typedef struct { uint32_t value:1; uint32_t reserved_31_1:31; } REG_otp_vpp_enable_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_vpp_enable_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_vpp_enable_TypeDef; typedef struct { uint32_t otp_cst:4; uint32_t rotp_cst:3; uint32_t reserved_31_7:25; } REG_otp_fsm_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_fsm_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_fsm_TypeDef; typedef struct { uint32_t value:32; } REG_otp_password_bitfiled_TypeDef; typedef struct { union { __IO REG_otp_password_bitfiled_TypeDef bf;//bitfiled __IO uint32_t word; }; } REG_otp_password_TypeDef; //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // memory map #define REG_OTP_TEST_MODE_BASE 0X40012000 #define REG_OTP_READ_BASE 0X40012004 #define REG_OTP_PIN_BASE 0X40012008 #define REG_OTP_PIN_PTM_BASE 0X4001200C #define REG_OTP_PIN_PDIN_BASE 0X40012010 #define REG_OTP_PIN_PDOUT_BASE 0X40012014 #define REG_OTP_READ_DISABLE_BASE 0X40012018 #define REG_OTP_DEBUG_SEL_BASE 0X4001201C #define REG_OTP_STATUS_BASE 0X40012020 #define REG_OTP_TIMING1_BASE 0X40012024 #define REG_OTP_TIMING2_BASE 0X40012028 #define REG_OTP_VPP_ENABLE_BASE 0X4001202C #define REG_OTP_FSM_BASE 0X40012030 #define REG_OTP_PASSWORD_BASE 0X40012034 //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // declaration #define REG_OTP_TEST_MODE ((REG_otp_test_mode_TypeDef *) REG_OTP_TEST_MODE_BASE) #define REG_OTP_READ ((REG_otp_read_TypeDef *) REG_OTP_READ_BASE) #define REG_OTP_PIN ((REG_otp_pin_TypeDef *) REG_OTP_PIN_BASE) #define REG_OTP_PIN_PTM ((REG_otp_pin_ptm_TypeDef *) REG_OTP_PIN_PTM_BASE) #define REG_OTP_PIN_PDIN ((REG_otp_pin_pdin_TypeDef *) REG_OTP_PIN_PDIN_BASE) #define REG_OTP_PIN_PDOUT ((REG_otp_pin_pdout_TypeDef *) REG_OTP_PIN_PDOUT_BASE) #define REG_OTP_READ_DISABLE ((REG_otp_read_disable_TypeDef *) REG_OTP_READ_DISABLE_BASE) #define REG_OTP_DEBUG_SEL ((REG_otp_debug_sel_TypeDef *) REG_OTP_DEBUG_SEL_BASE) #define REG_OTP_STATUS ((REG_otp_status_TypeDef *) REG_OTP_STATUS_BASE) #define REG_OTP_TIMING1 ((REG_otp_timing1_TypeDef *) REG_OTP_TIMING1_BASE) #define REG_OTP_TIMING2 ((REG_otp_timing2_TypeDef *) REG_OTP_TIMING2_BASE) #define REG_OTP_VPP_ENABLE ((REG_otp_vpp_enable_TypeDef *) REG_OTP_VPP_ENABLE_BASE) #define REG_OTP_FSM ((REG_otp_fsm_TypeDef *) REG_OTP_FSM_BASE) #define REG_OTP_PASSWORD ((REG_otp_password_TypeDef *) REG_OTP_PASSWORD_BASE) //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // set #define REG_OTP_TEST_MODE_EN_POS 0 #define REG_OTP_TEST_MODE_EN_MSK (0x1ul << REG_OTP_TEST_MODE_EN_POS) #define REG_OTP_TEST_MODE_EN_SET(num) (((num) << REG_OTP_TEST_MODE_EN_POS ) & REG_OTP_TEST_MODE_EN_MSK) #define REG_OTP_TEST_MODE_SEL_POS 1 #define REG_OTP_TEST_MODE_SEL_MSK (0x1ul << REG_OTP_TEST_MODE_SEL_POS) #define REG_OTP_TEST_MODE_SEL_SET(num) (((num) << REG_OTP_TEST_MODE_SEL_POS ) & REG_OTP_TEST_MODE_SEL_MSK) #define REG_OTP_READ_TKH_POS 0 #define REG_OTP_READ_TKH_MSK (0x3ul << REG_OTP_READ_TKH_POS) #define REG_OTP_READ_TKH_SET(num) (((num) << REG_OTP_READ_TKH_POS ) & REG_OTP_READ_TKH_MSK) #define REG_OTP_READ_TKL_POS 3 #define REG_OTP_READ_TKL_MSK (0x3ul << REG_OTP_READ_TKL_POS) #define REG_OTP_READ_TKL_SET(num) (((num) << REG_OTP_READ_TKL_POS ) & REG_OTP_READ_TKL_MSK) #define REG_OTP_READ_TAS_POS 8 #define REG_OTP_READ_TAS_MSK (0x3ul << REG_OTP_READ_TAS_POS) #define REG_OTP_READ_TAS_SET(num) (((num) << REG_OTP_READ_TAS_POS ) & REG_OTP_READ_TAS_MSK) #define REG_OTP_PIN_PCE_POS 0 #define REG_OTP_PIN_PCE_MSK (0x1ul << REG_OTP_PIN_PCE_POS) #define REG_OTP_PIN_PCE_SET(num) (((num) << REG_OTP_PIN_PCE_POS ) & REG_OTP_PIN_PCE_MSK) #define REG_OTP_PIN_PDSTB_POS 1 #define REG_OTP_PIN_PDSTB_MSK (0x1ul << REG_OTP_PIN_PDSTB_POS) #define REG_OTP_PIN_PDSTB_SET(num) (((num) << REG_OTP_PIN_PDSTB_POS ) & REG_OTP_PIN_PDSTB_MSK) #define REG_OTP_PIN_PPROG_POS 2 #define REG_OTP_PIN_PPROG_MSK (0x1ul << REG_OTP_PIN_PPROG_POS) #define REG_OTP_PIN_PPROG_SET(num) (((num) << REG_OTP_PIN_PPROG_POS ) & REG_OTP_PIN_PPROG_MSK) #define REG_OTP_PIN_PCLK_POS 3 #define REG_OTP_PIN_PCLK_MSK (0x1ul << REG_OTP_PIN_PCLK_POS) #define REG_OTP_PIN_PCLK_SET(num) (((num) << REG_OTP_PIN_PCLK_POS ) & REG_OTP_PIN_PCLK_MSK) #define REG_OTP_PIN_PWE_POS 4 #define REG_OTP_PIN_PWE_MSK (0x1ul << REG_OTP_PIN_PWE_POS) #define REG_OTP_PIN_PWE_SET(num) (((num) << REG_OTP_PIN_PWE_POS ) & REG_OTP_PIN_PWE_MSK) #define REG_OTP_PIN_PAIO_POS 8 #define REG_OTP_PIN_PAIO_MSK (0x3ul << REG_OTP_PIN_PAIO_POS) #define REG_OTP_PIN_PAIO_SET(num) (((num) << REG_OTP_PIN_PAIO_POS ) & REG_OTP_PIN_PAIO_MSK) #define REG_OTP_PIN_PA_POS 11 #define REG_OTP_PIN_PA_MSK (0xcul << REG_OTP_PIN_PA_POS) #define REG_OTP_PIN_PA_SET(num) (((num) << REG_OTP_PIN_PA_POS ) & REG_OTP_PIN_PA_MSK) #define REG_OTP_PIN_PTR_POS 23 #define REG_OTP_PIN_PTR_MSK (0x1ul << REG_OTP_PIN_PTR_POS) #define REG_OTP_PIN_PTR_SET(num) (((num) << REG_OTP_PIN_PTR_POS ) & REG_OTP_PIN_PTR_MSK) #define REG_OTP_PIN_PAS_POS 24 #define REG_OTP_PIN_PAS_MSK (0x1ul << REG_OTP_PIN_PAS_POS) #define REG_OTP_PIN_PAS_SET(num) (((num) << REG_OTP_PIN_PAS_POS ) & REG_OTP_PIN_PAS_MSK) #define REG_OTP_PIN_PTM_POS 0 #define REG_OTP_PIN_PTM_MSK (0x4ul << REG_OTP_PIN_PTM_POS) #define REG_OTP_PIN_PTM_SET(num) (((num) << REG_OTP_PIN_PTM_POS ) & REG_OTP_PIN_PTM_MSK) #define REG_OTP_PIN_PDIN_POS 0 #define REG_OTP_PIN_PDIN_MSK (0x20ul << REG_OTP_PIN_PDIN_POS) #define REG_OTP_PIN_PDIN_SET(num) (((num) << REG_OTP_PIN_PDIN_POS ) & REG_OTP_PIN_PDIN_MSK) #define REG_OTP_READ_DISABLE_DATA_POS 0 #define REG_OTP_READ_DISABLE_DATA_MSK (0x1ul << REG_OTP_READ_DISABLE_DATA_POS) #define REG_OTP_READ_DISABLE_DATA_SET(num) (((num) << REG_OTP_READ_DISABLE_DATA_POS ) & REG_OTP_READ_DISABLE_DATA_MSK) #define REG_OTP_DEBUG_SEL_POS 0 #define REG_OTP_DEBUG_SEL_MSK (0x2ul << REG_OTP_DEBUG_SEL_POS) #define REG_OTP_DEBUG_SEL_SET(num) (((num) << REG_OTP_DEBUG_SEL_POS ) & REG_OTP_DEBUG_SEL_MSK) #define REG_OTP_TIMING1_TCEL_POS 0 #define REG_OTP_TIMING1_TCEL_MSK (0x8ul << REG_OTP_TIMING1_TCEL_POS) #define REG_OTP_TIMING1_TCEL_SET(num) (((num) << REG_OTP_TIMING1_TCEL_POS ) & REG_OTP_TIMING1_TCEL_MSK) #define REG_OTP_TIMING1_TPENS_POS 8 #define REG_OTP_TIMING1_TPENS_MSK (0x8ul << REG_OTP_TIMING1_TPENS_POS) #define REG_OTP_TIMING1_TPENS_SET(num) (((num) << REG_OTP_TIMING1_TPENS_POS ) & REG_OTP_TIMING1_TPENS_MSK) #define REG_OTP_TIMING1_TASH_POS 16 #define REG_OTP_TIMING1_TASH_MSK (0x4ul << REG_OTP_TIMING1_TASH_POS) #define REG_OTP_TIMING1_TASH_SET(num) (((num) << REG_OTP_TIMING1_TASH_POS ) & REG_OTP_TIMING1_TASH_MSK) #define REG_OTP_TIMING1_TVD2ENS_POS 20 #define REG_OTP_TIMING1_TVD2ENS_MSK (0x4ul << REG_OTP_TIMING1_TVD2ENS_POS) #define REG_OTP_TIMING1_TVD2ENS_SET(num) (((num) << REG_OTP_TIMING1_TVD2ENS_POS ) & REG_OTP_TIMING1_TVD2ENS_MSK) #define REG_OTP_TIMING2_TSAS_POS 0 #define REG_OTP_TIMING2_TSAS_MSK (0x8ul << REG_OTP_TIMING2_TSAS_POS) #define REG_OTP_TIMING2_TSAS_SET(num) (((num) << REG_OTP_TIMING2_TSAS_POS ) & REG_OTP_TIMING2_TSAS_MSK) #define REG_OTP_TIMING2_TCS_POS 8 #define REG_OTP_TIMING2_TCS_MSK (0x8ul << REG_OTP_TIMING2_TCS_POS) #define REG_OTP_TIMING2_TCS_SET(num) (((num) << REG_OTP_TIMING2_TCS_POS ) & REG_OTP_TIMING2_TCS_MSK) #define REG_OTP_VPP_ENABLE_POS 0 #define REG_OTP_VPP_ENABLE_MSK (0x1ul << REG_OTP_VPP_ENABLE_POS) #define REG_OTP_VPP_ENABLE_SET(num) (((num) << REG_OTP_VPP_ENABLE_POS ) & REG_OTP_VPP_ENABLE_MSK) #define REG_OTP_PASSWORD_POS 0 #define REG_OTP_PASSWORD_MSK (0x20ul << REG_OTP_PASSWORD_POS) #define REG_OTP_PASSWORD_SET(num) (((num) << REG_OTP_PASSWORD_POS ) & REG_OTP_PASSWORD_MSK) //----------------------------------------------------------------------------- #endif /*__OTP_DEFINE_H__*/