/*
 * @Copyright (C),: 2020-2030, ConvenientPower Inc.
 * @File:
 * @Author: your name
 * @Date: 2022-11-14 16:22:56
 * @LastEditTime: 2022-12-02 20:00:31
 * @LastEditors: your name
 * @Description: Used to specify the main functions accomplished by this program file
 */
/**
 ******************************************************************************
 * @copyright Copyright (C), 2016-2022, ConvenientPower. Co., Ltd.
 * @file    ufcs_app.h
 * @version 1.0
 * @author  qing.cheng
 * @date    2022-12-02
 * @brief   Header file of UFCS_APP_H module.
 ******************************************************************************
 */

#ifndef __UFCS_APP_H__
#define __UFCS_APP_H__

#include "stdint.h"
#include <stdio.h>
#include "stdlib.h"
#include "string.h"
#include "ufcs_prl_define.h"
#include "ufcs_pe_define.h"

struct ufcs_param_s;
typedef struct ufcs_param_s ufcs_param_s;

//2 * 4 = 8
typedef struct
{
    //1byte sram calc zxs
    volatile ufcs_prl_flags_u ufcs_prl_flag;
    //2byte sram calc zxs
    volatile ufcs_prl_int_flags_u ufcs_prl_int_flags;
    volatile uint8_t prl_relay_anck_start_from_prl;
    //2byte sram calc zxs
    volatile ufcs_timer_flags_u ufcs_timer_flag;
    //2byte sram calc zxs
    volatile ufcs_pe_event_flags_u ufcs_pe_event_flag;
    //2byte sram calc zxs
    volatile ufcs_process_flags_u ufcs_process_flag;
    //1byte
    ufcs_system_app_flags_u ufcs_system_app_flags;
} ufcs_flags_s;


typedef struct
{
    void (*ufcs_handshake_init)(uint8_t port);
    void (*ufcs_phy_send_cable_reset)(uint8_t port);
    void (*ufcs_phy_send_hard_reset)(uint8_t port);
    void (*ufcs_handshake_disable)(uint8_t port);
    uint8_t(*ufcs_phy_dpdn_dn_comp_get)(uint8_t port);
    void (*ufcs_phy_exit_ufcs_mode)(uint8_t port);
    void (*ufcs_phy_ctrl_stop_src_tx)(uint8_t port, uint8_t enable);
    void (*ufcs_ping_follow_baudrate)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_phy_reg_config)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*send_ufcs_pkt)(uint8_t port, uint32_t dma_addr, ufcs_assist_s *ufcs_assist);



} ufcs_phy_callback_s;

typedef struct
{
    void (*ufcs_prl_analyze_header)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_pwr_snk_req_evaluate)(uint8_t port, ufcs_param_s *ufcs_param);
    uint8_t (*ufcs_src_verify_resp_msg_assemble)(uint8_t port, ufcs_param_s *ufcs_param);
    uint8_t (*ufcs_src_info_msg_assemble)(uint8_t port, ufcs_param_s *ufcs_param, uint8_t dat_cmd);
    void (*ufcs_src_deal_ctrl_packet)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_src_deal_data_packet)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*UFCS_PE_SRC_Ready_packet_deal)(uint8_t port, ufcs_param_s *ufcs_param);
} ufcs_callback_s;

typedef struct
{
    void (*app_src_power_set)(uint8_t port, ufcs_param_s *ufcs_param);
    uint8_t (*app_src_power_psrdy)(uint8_t port);
    void (*ufcs_softreset_fuc)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_src_volt_test_func)(uint8_t port, u_test_req *test_req);
    void (*ufcs_pe_src_reserved_action)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*curr_expcode)(uint8_t port, error_info_u *error_info);
    uint8_t (*ufcs_src_power_change_msg_assemble)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_src_vdm_dat_msg_assemble)(uint8_t port, ufcs_param_s *ufcs_param);
    void (* UFCS_PE_SRC_Test_callback)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_handshake_ping_callback)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_src_deal_vdm_packet)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_src_hw_vdm_deal_packet)(uint8_t port, ufcs_param_s *ufcs_param);
    uint8_t (*ufcs_src_hw_scpb_power_packet)(uint8_t port, ufcs_param_s *ufcs_param);
    uint8_t (*ufcs_src_hw_vdm_other_cmd_packet)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_src_other_data_cmd_packet)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_pe_src_request_information_action)(uint8_t port, ufcs_param_s *ufcs_param);

    void (*ufcs_versions_check)(uint8_t port, ufcs_param_s *ufcs_param);
    void (*ufcs_handshake_dn_hilevel_check)(uint8_t port, ufcs_param_s *ufcs_param);
} ufcs_callback2_s;


struct ufcs_param_s
{

    //4 *8 32byte sram calc zxs
    ufcs_prl_status_s ufcs_prl_status;  // prl status
    //2 *4 8byte sram calc zxs
    ufcs_pe_status_s ufcs_pe_status;    // pe status
    //2 *4 8byte sram calc zxs
    ufcs_flags_s ufcs_flags;            // flags            //48
    //188byte sram calc zxs
    ufcs_assist_s ufcs_assist;          // assist
    //15 *4 60byte sram calc zxs
    const ufcs_callback_s *ufcs_callback;
    const ufcs_callback2_s *ufcs_callback2;
    const ufcs_phy_callback_s *ufcs_phy_callback;
};



#endif