;/**************************************************************************//**
; * @file startup_CMSDK_CM0.s
; * @brief CMSIS Cortex-M0 Core Device Startup File for
; * Device CMSDK_CM0
; * @version V3.01
; * @date 06. March 2012
; *
; * @note
; * Copyright (C) 2012 ARM Limited. All rights reserved.
; *
; * @par
; * ARM Limited (ARM) is supplying this software for use with Cortex-M
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * @par
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; ******************************************************************************/
;/*
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;*/
; Stack Configuration
; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
Stack_Size EQU 0x00000350
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; Heap Configuration
; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;
Heap_Size EQU 0x00000100
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
DCD UFCS_Handler ;0,
DCD UFCS1_Handler ;1,
DCD PD0_Handler ;2,
DCD PD_Handler ;3,
DCD SCP_Handler ;4,
DCD SCP1_Handler ;5,
DCD DMA_DONE_Handler ;6,
DCD DMA1_DONE_Handler ;7,
DCD UART1_ALL_Handler ;8,
DCD ADC_Handler ;9,
DCD PORT0_COMB_Handler ;10,
DCD PWD_Handler ;11,
DCD TIMER0_Handler ;12,
DCD TIMER1_Handler ;13,
DCD TIMER2_Handler ;14,
DCD I2C_FUNC0_Handler ;15,
DCD I2C_FUNC1_Handler ;16,
DCD PD0_TYPEC_Handler ;17,
DCD PD_TYPEC_Handler ;18,
DCD CHIP_OT_Handler ;19,
DCD VIN_OVP_Handler ;20,
DCD VIN_UVP_Handler ;21,
DCD CCX_OVP_Handler ;22,
DCD UART2_ALL_Handler ;23,
DCD EXIT_GREEN_Handler ;24,
DCD I2C_PAD_Handler ;25,
DCD V2_OCP_Handler ;26,
DCD DNDP_COMP_Handler ;27,
DCD DNDP_OVP_Handler ;28,
DCD VD_Handler ;29,
DCD VBUS_OCP_Handler ;30
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT UFCS_Handler [WEAK]
EXPORT UFCS1_Handler [WEAK]
EXPORT PD0_Handler [WEAK]
EXPORT PD_Handler [WEAK]
EXPORT SCP_Handler [WEAK]
EXPORT SCP1_Handler [WEAK]
EXPORT DMA_DONE_Handler [WEAK]
EXPORT DMA1_DONE_Handler [WEAK]
EXPORT UART1_ALL_Handler [WEAK]
EXPORT ADC_Handler [WEAK]
EXPORT PORT0_COMB_Handler [WEAK]
EXPORT PWD_Handler [WEAK]
EXPORT TIMER0_Handler [WEAK]
EXPORT TIMER1_Handler [WEAK]
EXPORT TIMER2_Handler [WEAK]
EXPORT I2C_FUNC0_Handler [WEAK]
EXPORT I2C_FUNC1_Handler [WEAK]
EXPORT PD0_TYPEC_Handler [WEAK]
EXPORT PD_TYPEC_Handler [WEAK]
EXPORT CHIP_OT_Handler [WEAK]
EXPORT VIN_OVP_Handler [WEAK]
EXPORT VIN_UVP_Handler [WEAK]
EXPORT CCX_OVP_Handler [WEAK]
EXPORT UART2_ALL_Handler [WEAK]
EXPORT EXIT_GREEN_Handler [WEAK]
EXPORT I2C_PAD_Handler [WEAK]
EXPORT V2_OCP_Handler [WEAK]
EXPORT DNDP_COMP_Handler [WEAK]
EXPORT DNDP_OVP_Handler [WEAK]
EXPORT VD_Handler [WEAK]
EXPORT VBUS_OCP_Handler [WEAK]
UFCS_Handler
UFCS1_Handler
PD0_Handler
PD_Handler
SCP_Handler
SCP1_Handler
DMA_DONE_Handler
DMA1_DONE_Handler
UART1_ALL_Handler
ADC_Handler
PORT0_COMB_Handler
PWD_Handler
TIMER0_Handler
TIMER1_Handler
TIMER2_Handler
I2C_FUNC0_Handler
I2C_FUNC1_Handler
PD0_TYPEC_Handler
PD_TYPEC_Handler
CHIP_OT_Handler
VIN_OVP_Handler
VIN_UVP_Handler
CCX_OVP_Handler
UART2_ALL_Handler
EXIT_GREEN_Handler
I2C_PAD_Handler
V2_OCP_Handler
DNDP_COMP_Handler
DNDP_OVP_Handler
VD_Handler
VBUS_OCP_Handler
B .
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END