/** ****************************************************************************** * @copyright Copyright (C), 2016-2022, ConvenientPower. Co., Ltd. * @file comp_i2c.h * @version 1.0 * @author ziyue.zhang * @date 2022-12-03 * @brief Header file of comp_i2c_H module. ****************************************************************************** */ #ifndef _COMP_I2C_H_ #define _COMP_I2C_H_ #include "drv_i2c.h" #define I2C_STA_SLV_RX_ADDR_W_ACK 0x60 #define I2C_STA_SLV_RX_DATA_ACK 0x80 #define I2C_STA_SLV_RX_DATA_NACK 0x88 #define I2C_STA_SLV_RX_STO_RSTA 0xA0 #define I2C_STA_SLV_TX_ADDR_R_ACK 0xA8 #define I2C_STA_SLV_TX_DATA_ACK 0xB8 #define I2C_STA_SLV_TX_DATA_NACK 0xC0 #define I2C_STA_SLV_TX_LAST_DATA_ACK 0xC8 #define I2C_STA_MISC_BUS_ERR 0x00 #define I2C_STA_TO 0x07 #define I2C_SLAVE_R 0x01 #define I2C_SLAVE_W 0x02 //struct ap_reg_func_entry //{ // uint8_t addr; /* Next address */ // void (*func)(void); //}; //#define AP_REG_FUNC(_name, _func) \ // { (uint8_t)((uint32_t)(&(((s_ap_regs *)0)->_name)) + sizeof(((s_ap_regs *)0)->_name)), (_func) } //#define ARRAY_LEN(x) (sizeof(x) / sizeof((x)[0])) //#define TRANSMIT_BUF_SIZE 4 //#define RECEIVE_BUF_SIZE 4 //typedef struct //{ // uint32_t wr_addr; // uint8_t reg_data;//[TRANSMIT_BUF_SIZE]; // uint8_t receive;//[RECEIVE_BUF_SIZE]; // /* // * Private variables. They should never be accessed by i2c master. // */ // uint8_t new_request; // uint16_t watdog_cfg_10ms; // uint8_t gpio_usart_pa3_backup; // uint8_t gpio_usart_pa4_backup; // uint8_t mode_cfg_backup; // uint8_t ic_loop_mode_backup; // uint8_t last_trigger_cmd; // uint32_t old_adp_error_code; //} __attribute__((packed)) s_ap_regs; //extern s_ap_regs g_ap_regs; //typedef void(*i2c_drv_rw_cb)(uint8_t rw); //typedef struct i2c_slave_msg_s //{ // uint8_t *rx_buf; // uint8_t *tx_buf; // uint8_t *tx; // uint8_t *tx_end; // uint16_t rx_len; // uint16_t tx_len; // uint16_t rx_buf_size; // uint16_t tx_buf_size; // i2c_drv_rw_cb cb; // void(*tx_end_cb)(void); // uint8_t slave_addr; //} i2c_slave_msg_s; /* * @brief comp_i2c_handler * @param i2c_num * @param *i2c_slave * @note * @retval null */ void comp_i2c_handler(uint8_t i2c_num, i2c_slave_msg_s *i2c_slave); /* * @brief comp_i2c_master_init * @param i2c_num * @param scl_num * @param sda_num * @param freq * @note * @retval null */ void comp_i2c_master_init(uint8_t i2c_num, uint8_t scl_num, uint8_t sda_num, drv_i2c_freq_e freq); /* * @brief comp_i2c_slave_init * @param i2c_num * @param scl_num * @param sda_num * @note * @retval null */ void comp_i2c_slave_init(uint8_t i2c_num, uint8_t scl_num, uint8_t sda_num, drv_i2c_freq_e freq); /* * When a register's last byte is accessed, the associated callback is called. */ void comp_i2c_ap_reg(uint8_t addr, uint8_t len, const struct ap_reg_func_entry *tb, uint8_t tb_size); /* * @brief comp_i2c_read8 * @param i2c_num * @param addr * @param reg * @param *val * @note * @retval null */ bool comp_i2c_read8(uint8_t i2c_num, uint8_t addr, uint8_t reg, uint8_t *val); /* * @brief comp_i2c_write8 * @param i2c_num * @param addr * @param reg * @param val * @note * @retval null */ bool comp_i2c_write8(uint8_t i2c_num, uint8_t addr, uint8_t reg, uint8_t val); /* * @brief comp_i2c_read16 * @param i2c_num * @param addr * @param reg * @param *val * @note * @retval null */ bool comp_i2c_read16(uint8_t i2c_num, uint8_t addr, uint8_t reg, uint16_t *val); /* * @brief comp_i2c_write16 * @param i2c_num * @param addr * @param reg * @param val * @note * @retval null */ bool comp_i2c_write16(uint8_t i2c_num, uint8_t addr, uint8_t reg, uint16_t val); /* * @brief comp_i2c_read32 * @param i2c_num * @param addr * @param reg * @param *val * @note * @retval null */ bool comp_i2c_read32(uint8_t i2c_num, uint8_t addr, uint8_t reg, uint32_t *val); /* * @brief comp_i2c_write32 * @param i2c_num * @param addr * @param reg * @param val * @note * @retval null */ bool comp_i2c_write32(uint8_t i2c_num, uint8_t addr, uint8_t reg, uint32_t val); #endif /* _COMP_I2C_H_ */