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387 lines
15 KiB
387 lines
15 KiB
#ifndef __OTP_DEFINE_H__
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#define __OTP_DEFINE_H__
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//-----------------------------------------------------------------------------
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// otp registers definition
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//-----------------------------------------------------------------------------
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#pragma anon_unions
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//-----------------------------------------------------------------------------
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// registers structures
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typedef struct
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{
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uint32_t en:1;
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uint32_t sel:1;
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uint32_t reserved_31_2:30;
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} REG_otp_test_mode_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_test_mode_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_test_mode_TypeDef;
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typedef struct
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{
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uint32_t tkh:3;
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uint32_t tkl:3;
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uint32_t reserved_7_6:2;
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uint32_t tas:3;
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uint32_t reserved_31_11:21;
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} REG_otp_read_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_read_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_read_TypeDef;
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typedef struct
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{
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uint32_t pce:1;
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uint32_t pdstb:1;
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uint32_t pprog:1;
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uint32_t pclk:1;
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uint32_t pwe:1;
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uint32_t reserved_7_5:3;
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uint32_t paio:3;
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uint32_t pa:12;
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uint32_t ptr:1;
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uint32_t pas:1;
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uint32_t reserved_31_25:7;
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} REG_otp_pin_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_pin_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_pin_TypeDef;
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typedef struct
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{
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uint32_t value:4;
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uint32_t reserved_31_4:28;
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} REG_otp_pin_ptm_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_pin_ptm_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_pin_ptm_TypeDef;
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typedef struct
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{
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uint32_t value:32;
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} REG_otp_pin_pdin_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_pin_pdin_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_pin_pdin_TypeDef;
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typedef struct
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{
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uint32_t value:32;
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} REG_otp_pin_pdout_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_pin_pdout_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_pin_pdout_TypeDef;
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typedef struct
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{
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uint32_t data:1;
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uint32_t reserved_31_1:31;
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} REG_otp_read_disable_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_read_disable_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_read_disable_TypeDef;
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typedef struct
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{
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uint32_t value:2;
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uint32_t reserved_31_2:30;
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} REG_otp_debug_sel_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_debug_sel_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_debug_sel_TypeDef;
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typedef struct
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{
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uint32_t rdy:1;
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uint32_t d2a_vdd2:1;
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uint32_t reserved_31_2:30;
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} REG_otp_status_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_status_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_status_TypeDef;
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typedef struct
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{
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uint32_t tcel:8;
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uint32_t tpens:8;
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uint32_t tash:4;
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uint32_t tvd2ens:4;
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uint32_t reserved_31_24:8;
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} REG_otp_timing1_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_timing1_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_timing1_TypeDef;
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typedef struct
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{
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uint32_t tsas:8;
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uint32_t tcs:8;
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uint32_t reserved_31_16:16;
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} REG_otp_timing2_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_timing2_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_timing2_TypeDef;
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typedef struct
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{
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uint32_t value:1;
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uint32_t reserved_31_1:31;
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} REG_otp_vpp_enable_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_vpp_enable_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_vpp_enable_TypeDef;
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typedef struct
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{
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uint32_t otp_cst:4;
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uint32_t rotp_cst:3;
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uint32_t reserved_31_7:25;
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} REG_otp_fsm_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_fsm_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_fsm_TypeDef;
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typedef struct
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{
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uint32_t value:32;
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} REG_otp_password_bitfiled_TypeDef;
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typedef struct
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{
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union {
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__IO REG_otp_password_bitfiled_TypeDef bf;//bitfiled
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__IO uint32_t word;
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};
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} REG_otp_password_TypeDef;
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// memory map
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#define REG_OTP_TEST_MODE_BASE 0X40012000
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#define REG_OTP_READ_BASE 0X40012004
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#define REG_OTP_PIN_BASE 0X40012008
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#define REG_OTP_PIN_PTM_BASE 0X4001200C
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#define REG_OTP_PIN_PDIN_BASE 0X40012010
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#define REG_OTP_PIN_PDOUT_BASE 0X40012014
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#define REG_OTP_READ_DISABLE_BASE 0X40012018
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#define REG_OTP_DEBUG_SEL_BASE 0X4001201C
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#define REG_OTP_STATUS_BASE 0X40012020
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#define REG_OTP_TIMING1_BASE 0X40012024
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#define REG_OTP_TIMING2_BASE 0X40012028
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#define REG_OTP_VPP_ENABLE_BASE 0X4001202C
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#define REG_OTP_FSM_BASE 0X40012030
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#define REG_OTP_PASSWORD_BASE 0X40012034
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// declaration
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#define REG_OTP_TEST_MODE ((REG_otp_test_mode_TypeDef *) REG_OTP_TEST_MODE_BASE)
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#define REG_OTP_READ ((REG_otp_read_TypeDef *) REG_OTP_READ_BASE)
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#define REG_OTP_PIN ((REG_otp_pin_TypeDef *) REG_OTP_PIN_BASE)
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#define REG_OTP_PIN_PTM ((REG_otp_pin_ptm_TypeDef *) REG_OTP_PIN_PTM_BASE)
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#define REG_OTP_PIN_PDIN ((REG_otp_pin_pdin_TypeDef *) REG_OTP_PIN_PDIN_BASE)
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#define REG_OTP_PIN_PDOUT ((REG_otp_pin_pdout_TypeDef *) REG_OTP_PIN_PDOUT_BASE)
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#define REG_OTP_READ_DISABLE ((REG_otp_read_disable_TypeDef *) REG_OTP_READ_DISABLE_BASE)
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#define REG_OTP_DEBUG_SEL ((REG_otp_debug_sel_TypeDef *) REG_OTP_DEBUG_SEL_BASE)
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#define REG_OTP_STATUS ((REG_otp_status_TypeDef *) REG_OTP_STATUS_BASE)
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#define REG_OTP_TIMING1 ((REG_otp_timing1_TypeDef *) REG_OTP_TIMING1_BASE)
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#define REG_OTP_TIMING2 ((REG_otp_timing2_TypeDef *) REG_OTP_TIMING2_BASE)
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#define REG_OTP_VPP_ENABLE ((REG_otp_vpp_enable_TypeDef *) REG_OTP_VPP_ENABLE_BASE)
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#define REG_OTP_FSM ((REG_otp_fsm_TypeDef *) REG_OTP_FSM_BASE)
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#define REG_OTP_PASSWORD ((REG_otp_password_TypeDef *) REG_OTP_PASSWORD_BASE)
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// set
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#define REG_OTP_TEST_MODE_EN_POS 0
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#define REG_OTP_TEST_MODE_EN_MSK (0x1ul << REG_OTP_TEST_MODE_EN_POS)
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#define REG_OTP_TEST_MODE_EN_SET(num) (((num) << REG_OTP_TEST_MODE_EN_POS ) & REG_OTP_TEST_MODE_EN_MSK)
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#define REG_OTP_TEST_MODE_SEL_POS 1
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#define REG_OTP_TEST_MODE_SEL_MSK (0x1ul << REG_OTP_TEST_MODE_SEL_POS)
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#define REG_OTP_TEST_MODE_SEL_SET(num) (((num) << REG_OTP_TEST_MODE_SEL_POS ) & REG_OTP_TEST_MODE_SEL_MSK)
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#define REG_OTP_READ_TKH_POS 0
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#define REG_OTP_READ_TKH_MSK (0x3ul << REG_OTP_READ_TKH_POS)
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#define REG_OTP_READ_TKH_SET(num) (((num) << REG_OTP_READ_TKH_POS ) & REG_OTP_READ_TKH_MSK)
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#define REG_OTP_READ_TKL_POS 3
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#define REG_OTP_READ_TKL_MSK (0x3ul << REG_OTP_READ_TKL_POS)
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#define REG_OTP_READ_TKL_SET(num) (((num) << REG_OTP_READ_TKL_POS ) & REG_OTP_READ_TKL_MSK)
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#define REG_OTP_READ_TAS_POS 8
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#define REG_OTP_READ_TAS_MSK (0x3ul << REG_OTP_READ_TAS_POS)
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#define REG_OTP_READ_TAS_SET(num) (((num) << REG_OTP_READ_TAS_POS ) & REG_OTP_READ_TAS_MSK)
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#define REG_OTP_PIN_PCE_POS 0
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#define REG_OTP_PIN_PCE_MSK (0x1ul << REG_OTP_PIN_PCE_POS)
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#define REG_OTP_PIN_PCE_SET(num) (((num) << REG_OTP_PIN_PCE_POS ) & REG_OTP_PIN_PCE_MSK)
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#define REG_OTP_PIN_PDSTB_POS 1
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#define REG_OTP_PIN_PDSTB_MSK (0x1ul << REG_OTP_PIN_PDSTB_POS)
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#define REG_OTP_PIN_PDSTB_SET(num) (((num) << REG_OTP_PIN_PDSTB_POS ) & REG_OTP_PIN_PDSTB_MSK)
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#define REG_OTP_PIN_PPROG_POS 2
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#define REG_OTP_PIN_PPROG_MSK (0x1ul << REG_OTP_PIN_PPROG_POS)
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#define REG_OTP_PIN_PPROG_SET(num) (((num) << REG_OTP_PIN_PPROG_POS ) & REG_OTP_PIN_PPROG_MSK)
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#define REG_OTP_PIN_PCLK_POS 3
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#define REG_OTP_PIN_PCLK_MSK (0x1ul << REG_OTP_PIN_PCLK_POS)
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#define REG_OTP_PIN_PCLK_SET(num) (((num) << REG_OTP_PIN_PCLK_POS ) & REG_OTP_PIN_PCLK_MSK)
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#define REG_OTP_PIN_PWE_POS 4
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#define REG_OTP_PIN_PWE_MSK (0x1ul << REG_OTP_PIN_PWE_POS)
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#define REG_OTP_PIN_PWE_SET(num) (((num) << REG_OTP_PIN_PWE_POS ) & REG_OTP_PIN_PWE_MSK)
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#define REG_OTP_PIN_PAIO_POS 8
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#define REG_OTP_PIN_PAIO_MSK (0x3ul << REG_OTP_PIN_PAIO_POS)
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#define REG_OTP_PIN_PAIO_SET(num) (((num) << REG_OTP_PIN_PAIO_POS ) & REG_OTP_PIN_PAIO_MSK)
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#define REG_OTP_PIN_PA_POS 11
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#define REG_OTP_PIN_PA_MSK (0xcul << REG_OTP_PIN_PA_POS)
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#define REG_OTP_PIN_PA_SET(num) (((num) << REG_OTP_PIN_PA_POS ) & REG_OTP_PIN_PA_MSK)
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#define REG_OTP_PIN_PTR_POS 23
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#define REG_OTP_PIN_PTR_MSK (0x1ul << REG_OTP_PIN_PTR_POS)
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#define REG_OTP_PIN_PTR_SET(num) (((num) << REG_OTP_PIN_PTR_POS ) & REG_OTP_PIN_PTR_MSK)
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#define REG_OTP_PIN_PAS_POS 24
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#define REG_OTP_PIN_PAS_MSK (0x1ul << REG_OTP_PIN_PAS_POS)
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#define REG_OTP_PIN_PAS_SET(num) (((num) << REG_OTP_PIN_PAS_POS ) & REG_OTP_PIN_PAS_MSK)
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#define REG_OTP_PIN_PTM_POS 0
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#define REG_OTP_PIN_PTM_MSK (0x4ul << REG_OTP_PIN_PTM_POS)
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#define REG_OTP_PIN_PTM_SET(num) (((num) << REG_OTP_PIN_PTM_POS ) & REG_OTP_PIN_PTM_MSK)
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#define REG_OTP_PIN_PDIN_POS 0
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#define REG_OTP_PIN_PDIN_MSK (0x20ul << REG_OTP_PIN_PDIN_POS)
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#define REG_OTP_PIN_PDIN_SET(num) (((num) << REG_OTP_PIN_PDIN_POS ) & REG_OTP_PIN_PDIN_MSK)
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#define REG_OTP_READ_DISABLE_DATA_POS 0
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#define REG_OTP_READ_DISABLE_DATA_MSK (0x1ul << REG_OTP_READ_DISABLE_DATA_POS)
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#define REG_OTP_READ_DISABLE_DATA_SET(num) (((num) << REG_OTP_READ_DISABLE_DATA_POS ) & REG_OTP_READ_DISABLE_DATA_MSK)
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#define REG_OTP_DEBUG_SEL_POS 0
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#define REG_OTP_DEBUG_SEL_MSK (0x2ul << REG_OTP_DEBUG_SEL_POS)
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#define REG_OTP_DEBUG_SEL_SET(num) (((num) << REG_OTP_DEBUG_SEL_POS ) & REG_OTP_DEBUG_SEL_MSK)
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#define REG_OTP_TIMING1_TCEL_POS 0
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#define REG_OTP_TIMING1_TCEL_MSK (0x8ul << REG_OTP_TIMING1_TCEL_POS)
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#define REG_OTP_TIMING1_TCEL_SET(num) (((num) << REG_OTP_TIMING1_TCEL_POS ) & REG_OTP_TIMING1_TCEL_MSK)
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#define REG_OTP_TIMING1_TPENS_POS 8
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#define REG_OTP_TIMING1_TPENS_MSK (0x8ul << REG_OTP_TIMING1_TPENS_POS)
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#define REG_OTP_TIMING1_TPENS_SET(num) (((num) << REG_OTP_TIMING1_TPENS_POS ) & REG_OTP_TIMING1_TPENS_MSK)
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#define REG_OTP_TIMING1_TASH_POS 16
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#define REG_OTP_TIMING1_TASH_MSK (0x4ul << REG_OTP_TIMING1_TASH_POS)
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#define REG_OTP_TIMING1_TASH_SET(num) (((num) << REG_OTP_TIMING1_TASH_POS ) & REG_OTP_TIMING1_TASH_MSK)
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#define REG_OTP_TIMING1_TVD2ENS_POS 20
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#define REG_OTP_TIMING1_TVD2ENS_MSK (0x4ul << REG_OTP_TIMING1_TVD2ENS_POS)
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#define REG_OTP_TIMING1_TVD2ENS_SET(num) (((num) << REG_OTP_TIMING1_TVD2ENS_POS ) & REG_OTP_TIMING1_TVD2ENS_MSK)
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#define REG_OTP_TIMING2_TSAS_POS 0
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#define REG_OTP_TIMING2_TSAS_MSK (0x8ul << REG_OTP_TIMING2_TSAS_POS)
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#define REG_OTP_TIMING2_TSAS_SET(num) (((num) << REG_OTP_TIMING2_TSAS_POS ) & REG_OTP_TIMING2_TSAS_MSK)
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#define REG_OTP_TIMING2_TCS_POS 8
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#define REG_OTP_TIMING2_TCS_MSK (0x8ul << REG_OTP_TIMING2_TCS_POS)
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#define REG_OTP_TIMING2_TCS_SET(num) (((num) << REG_OTP_TIMING2_TCS_POS ) & REG_OTP_TIMING2_TCS_MSK)
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#define REG_OTP_VPP_ENABLE_POS 0
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#define REG_OTP_VPP_ENABLE_MSK (0x1ul << REG_OTP_VPP_ENABLE_POS)
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#define REG_OTP_VPP_ENABLE_SET(num) (((num) << REG_OTP_VPP_ENABLE_POS ) & REG_OTP_VPP_ENABLE_MSK)
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#define REG_OTP_PASSWORD_POS 0
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#define REG_OTP_PASSWORD_MSK (0x20ul << REG_OTP_PASSWORD_POS)
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#define REG_OTP_PASSWORD_SET(num) (((num) << REG_OTP_PASSWORD_POS ) & REG_OTP_PASSWORD_MSK)
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//-----------------------------------------------------------------------------
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#endif /*__OTP_DEFINE_H__*/
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