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/**
******************************************************************************
* @copyright Copyright (C), 2016-2022, ConvenientPower. Co., Ltd.
* @file drv_dpdn.h
* @version 1.0
* @author qing.cheng
* @date 2022-11-03
* @brief Header file of DRV_DPDN_H module.
******************************************************************************
*/
#ifndef _DRV_DPDN_H_
#define _DRV_DPDN_H_
#include "core_comm.h"
#include "drv_clock.h"
#include "drv_gpio.h"
#include "drv_analog.h"
typedef enum
{
DPDN_VTH_1P2_1P1v = 0,
DPDN_VTH_1P6_1P3v ,
}dpdn_vth_e;
/*
* @brief drv_dpdn_dn_comp_0p6v_get
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval 1:dn--0.6V
*/
uint8_t drv_dpdn_dn_comp_0p6v_get(uint8_t port);
/*
* @brief drv_dpdn_dn_comp_3p3v_get
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval 1:dn--3.3V
*/
uint8_t drv_dpdn_dn_comp_3p3v_get(uint8_t port);
/*
* @brief drv_dpdn_dp_comp_0p6v_get
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval 1:dp--0.6V
*/
uint8_t drv_dpdn_dp_comp_0p6v_get(uint8_t port);
/*
* @brief drv_dpdn_dp_comp_3p3v_get
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval 1:dp--3.3V
*/
uint8_t drv_dpdn_dp_comp_3p3v_get(uint8_t port);
/*
* @brief drv_dpdn_dn_comp_get
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval dn compare value £¨1:0.6V,3:3.3V£©
*/
uint8_t drv_dpdn_dn_comp_get(uint8_t port);
/*
* @brief drv_dpdn_dp_comp_get
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval dp compare value £¨1:0.6V,3:3.3V£©
*/
uint8_t drv_dpdn_dp_comp_get(uint8_t port);
/*
* @brief drv_dpdn_dp_0p0v_get
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval 1:dp < 0.6V
*/
uint8_t drv_dpdn_dp_0p0v_get(uint8_t port);
/*
* @brief drv_dpdn_dp_0p0v_get
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval 1:ovp,0:normal
*/
uint8_t drv_dpdn_ov_status_get(uint8_t port);
/*
* @brief drv_dpdn_short_staus_get
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval 1:dpdn short
*/
uint8_t drv_dpdn_short_staus_get(uint8_t port);
/*
* @brief drv_dpdn_short_set
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval null
*/
void drv_dpdn_short_set(uint8_t port, uint8_t en);
/*
* @brief drv_dpdn_dn_pull_down_resistor_set
* @param port 0:DPDN1,1:DPDN2,en //1: connect 20k res on dn
* @note
* @retval null
*/
void drv_dpdn_dn_pull_down_resistor_set(uint8_t port, uint8_t en);
/*
* @brief drv_dpdn_dp_pull_down_resistor_set
* @param port 0:DPDN1,1:DPDN2,en //1: connect 20k res on dp
* @note
* @retval null
*/
void drv_dpdn_dp_pull_down_resistor_set(uint8_t port, uint8_t en);
/*
* @brief drv_dpdn_dpdn_comp_0p6v_get
* @param port 0:DPDN1,1:DPDN2
* @note
* @retval 1:dpdn--0.6V
*/
uint8_t drv_dpdn_dpdn_comp_0p6v_get(uint8_t port);
/*
* @brief drv_dn_dp_init
* @param port 0:DPDN1,1:DPDN2,
* @param value
* @note
* @retval null
*/
void drv_dn_dp_init(uint8_t port, uint32_t value);
/*
* @brief drv_dpdn_vth_set
* @param port 0:DPDN1,1:DPDN2
* @param vth: 1:set high/low level 16./1.3V;0: 1.2v/1.1v(default)
* @note
* @retval
*/
__forceinline void drv_dpdn_vth_set(uint8_t port,bool vth)
{
if(port == 0)
{
/*1:set high/low level 16./1.3V;0: 1.2v/1.1v(default)*/
REG_ANALOG_DPDN1->bf.vth_sel = vth;
}
else
{
REG_ANALOG_DPDN2->bf.vth_sel = vth;
}
}
#endif