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192 lines
3.9 KiB
192 lines
3.9 KiB
/**
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******************************************************************************
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* @copyright Copyright (C), 2016-2022, ConvenientPower. Co., Ltd.
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* @file comp_primary_side.h
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* @version 1.0
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* @author qing.cheng
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* @date 2023-10-07
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* @brief Header file of COMP_PRIMARY_SIDE_H module.
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******************************************************************************
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*/
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#ifndef _COMP_PRIMARY_SIDE_H_
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#define _COMP_PRIMARY_SIDE_H_
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#include "core_comm.h"
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#include "drv_comm.h"
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#include "rom_inc.h"
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#include "config.h"
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#if ADC_TRIM_ENABLE
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#define VD_RD_2P4K VD_RVDS_TRIM_VALUE
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#else
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#define VD_RD_2P4K 2400
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#endif
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#define VD_RP_VALUE 46400
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//N * 128
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#define N_RATIO 800
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#define VD_PEAK_LIMIT 400
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typedef struct
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{
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uint32_t ac_freq; //hz
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uint32_t ac_vol;
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uint8_t vd_peak_cnt;
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uint8_t ac_high;
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uint8_t ac_cnt;
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uint8_t ac_sample_flag;
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uint16_t high_width;
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uint16_t low_width;
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} edge_info_s;
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extern edge_info_s g_edge_param;
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#define AC_H_VOL_VPP 254
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#define AC_L_VOL_VPP 150//226000
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#if VD_PEAK_DETECT
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#define VD_PEAK_TIMEOUT 5
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#endif
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#if VD_FREQ_DETECT
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#define FREQ_CALC_TIME (0x64)
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#define FREQ_CALC_START (1 << 9)
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#endif
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#define VD_SCALE_EN (0 << 5)
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#define VD_ANALOG_CONFIG (0x01 | VD_SCALE_EN)
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#define SAMPLE_ON_EN 1
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#define BLANK_TIME (0x04) //83.3/lsb
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#define SAMPLE_TIME (0x01 << 16)
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#define VD_FILTER_0NS 0
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#define VD_FILTER_666NS 1
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#define VD_FILTER_249NS 2
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#define VD_FILTER_498NS 3
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#define REG_EXTINT_VD_FREQ_CALC_INT_BASE\
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(0x40013018)
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#define REG_FILTER_VD_100MV_COMP_BASE\
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(0x40014020)
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#define REG_MSIC_VD_FREQ_CALC_BASE\
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(0x4000f820)
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#define REG_MISC_VD_LS_COMP_BASE\
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(0x4000F824)
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#define DRV_FILTER_VD_100MV_COMP_MASK_SET(x)\
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do{\
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*((uint32_t *)(REG_FILTER_VD_100MV_COMP_BASE)) |= ((x & 0x03) << 20);\
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}while(0)
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#define DRV_EXTINT_VD_LS_CHG_MASK_SET(x)\
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do{\
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*((uint32_t *)(REG_EXTINT_VD_LS_COMP_CHG_INT_BASE)) |= x;\
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}while(0)
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#define DRV_EXTINT_VD_LS_CHG_GET_READ()\
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(*((uint32_t *)(REG_EXTINT_VD_LS_COMP_CHG_INT_BASE)))
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#define DRV_EXTINT_VD_FREQ_CALC_MASK_SET(x)\
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do{\
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*((uint32_t *)(REG_EXTINT_VD_FREQ_CALC_INT_BASE)) |= x;\
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}while(0)
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#define DRV_MISC_VD_LS_COMP_MASK_SET(x)\
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do{\
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*((uint32_t *)(REG_MISC_VD_LS_COMP_BASE)) |= x;\
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}while(0)
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#define COMP_VD_RD_2P4K_SET()\
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do{\
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REG_ANALOG_ANA_CTRL->word |= 0x01;\
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}while(0)
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#define COMP_VD_RD_2P4K_RESET()\
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do{\
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REG_ANALOG_ANA_CTRL->word &= ~(0x01);\
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}while(0)
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#define HAL_GET_VD_FREQ()\
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((((*((uint32_t *)REG_MSIC_VD_FREQ_CALC_BASE) >> 16) & 0xffff) * 1000) / FREQ_CALC_TIME)
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#define HAL_VD_AC_SAMPLE_DISABLE()\
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do{\
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g_edge_param.ac_sample_flag = false;\
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}while(0)
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/*
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* @brief comp_primary_side_init
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* @param NULL
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* @note
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* @retval NULL
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*/
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void comp_primary_side_init(void);
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/*
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* @brief comp_vd_peak_timer_config
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* @param edge_param
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* @note add timeout, when adc detect vd signal of not rising
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* that adc interrupt not trigger.
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* @retval NULL
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*/
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void comp_vd_peak_timer_config(edge_info_s *edge_param);
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/*
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* @brief comp_vd_peak_detect_timeout
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* @param edge_param
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* @note vd adc channel timeout check.
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* @retval NULL
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*/
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void comp_vd_peak_detect_timeout(edge_info_s *edge_param);
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/*
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* @brief comp_vd_detect_ac_vol
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* @param edge_param
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* Vac = (V_vd / R_vds * (R_vd + R_vds) - Vo) * n / 1.414213
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* Vo:output vol.
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* n:ratio.
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* R_vds:2.4k.
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* R_vd:pull-up resistor.
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* @note get ac_input vol
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* @retval NULL
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*/
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void comp_vd_detect_ac_vol(edge_info_s *edge_param);
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/*
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* @brief comp_primary_freq_get
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* @param NULL
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* @note NULL
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* @retval NULL
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*/
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void comp_primary_freq_get(void);
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#endif /*HAL_PRIMARY_SIDE_H*/
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