CPS/MXWK_美芯微科/common/rom_inc/drv/drv_adc.h

/**
 ******************************************************************************
 * @copyright Copyright (C), 2016-2022, ConvenientPower. Co., Ltd.
 * @file    drv_adc.h
 * @version 1.0
 * @author  qing.cheng
 * @date    2022-10-27
 * @brief   Header file of DRV_ADC_H module.
 ******************************************************************************
 */
#ifndef _DRV_ADC_H_
#define _DRV_ADC_H_
#include "core_comm.h"
#include "adc_define.h"


typedef enum ADC_CHANNEL_e
{
    ADC_CH0 = 0,
    ADC_CH1,
    ADC_CH2,
    ADC_CH3,
    ADC_CH4,
    ADC_CH5,
    ADC_CH6,
    ADC_CH7,
    ADC_CH8,
    ADC_CH9,
    ADC_CH10,
    ADC_CH11,
    ADC_CH12,
    ADC_CH13,
    ADC_CH14,
    ADC_CH15,
    ADC_CH16,
    ADC_CH17,
    ADC_CH18,
    ADC_CH19,
    ADC_CH20,
    ADC_CH21,
    ADC_CH22,
    ADC_CH23,

} ADC_CHANNEL_e;

typedef enum ADC_SAMPLE_CLK_e
{
    SAMPLE_CLK_4 = 0,
    SAMPLE_CLK_8 = 0x20,
    SAMPLE_CLK_12 = 0x40,
    SAMPLE_CLK_16 = 96,
    SAMPLE_CLK_32 = 128,
    SAMPLE_CLK_64 = 160,
    SAMPLE_CLK_128 = 192,
    SAMPLE_CLK_256 = 224,
} ADC_SAMPLE_CLK_e;


typedef enum ADC_CLK_DIV_e
{
    DIV_CLK_1M = 0,
    DIV_CLK_500K = 0X100,
    DIV_CLK_250K = 0X200,
    DIV_CLK_125K = 0X300,

} ADC_CLK_DIV_e;

typedef enum ADC_AVERAGE_TIMES_e
{
    ADC_AVERAGE_TIMES_1 = 0,
    ADC_AVERAGE_TIMES_2 = 0X400,
    ADC_AVERAGE_TIMES_4 = 0X800,
    ADC_AVERAGE_TIMES_8 = 0XC00,

} ADC_AVERAGE_TIMES_e;

typedef enum ADC_CHOP_SEL_e
{
    ADC_CHOP_SEL0 = 0,
    ADC_CHOP_SEL1 = 0X1000,
} ADC_CHOP_SEL_e;

#define ADC_BLOCK_ENABLE  0X10000
#define ADC_START         0X20000


/*
  * @brief  drv_adc_cfg_word
  * @param  word
  * @note
  * @retval null
*/
__forceinline void drv_adc_cfg_word(uint32_t word)
{
    REG_ADC_CFG->word = word;
}

/*
  * @brief  drv_adc_cfg_set_channel
  * @param  channel
  * @note
  * @retval null
*/
__forceinline void drv_adc_cfg_set_channel(uint8_t channel)
{
    REG_ADC_CFG->bf.ch_en = channel;
}


/*
  * @brief  drv_adc_cfg_mask_clr
  * @param  clr
  * @note
  * @retval null
*/
__forceinline void drv_adc_cfg_mask_clr(uint32_t clr)
{
    REG_ADC_CFG->word &= ~(clr);
}



/*
  * @brief  drv_adc_cfg_mak_set
  * @param  set
  * @note
  * @retval null
*/
__forceinline void drv_adc_cfg_mak_set(uint32_t set)
{
    REG_ADC_CFG->word |= set;
}


/*
  * @brief  drv_adc_data_read
  * @param  null
  * @note
  * @retval adc sample data
*/
__forceinline uint16_t drv_adc_data_read(void)
{
    return (REG_ADC_DATA->word & 0xfff);
}

/*
  * @brief  drv_adc_int_word
  * @param  word
  * @note
  * @retval null
*/
__forceinline void drv_adc_int_word(uint8_t word)
{
    REG_ADC_INT->word = word;
}

/*
  * @brief  drv_adc_int_mask_word
  * @param  word
  * @note
  * @retval null
*/
__forceinline void drv_adc_int_mask_word(uint8_t word)
{
    REG_ADC_INT_MASK->word = word;
}


/*
  * @brief  drv_adc_dbg_mask_clr
  * @param  clr
  * @note
  * @retval null
*/
__forceinline void drv_adc_dbg_mask_clr(uint16_t clr)
{
    REG_ADC_DBG->word &= ~(clr);
}


/*
  * @brief  drv_adc_dbg_mask_set
  * @param  value
  * @note
  * @retval null
*/
__forceinline void drv_adc_dbg_mask_set(uint16_t value)
{
    REG_ADC_DBG->word |= value;
}


/*
  * @brief  drv_adc_test_spl_data_read
  * @param  null
  * @note
  * @retval spl_data
*/
__forceinline uint32_t drv_adc_test_spl_data_read(void)
{
    return (REG_ADC_TEST_SPL_DATA->word);
}


/*
  * @brief  drv_adc_test0_data_read
  * @param  null
  * @note
  * @retval test0 data
*/
__forceinline uint32_t drv_adc_test0_data_read(void)
{
    return (REG_ADC_ADC_TEST0->word);
}

/*
  * @brief  drv_adc_test1_data_read
  * @param  null
  * @note
  * @retval test1 data
*/
__forceinline uint8_t drv_adc_test1_data_read(void)
{
    return (REG_ADC_ADC_TEST1->word & 0x03);
}


/*
  * @brief  drv_adc_test2_data_read
  * @param  null
  * @note
  * @retval test2 data
*/
__forceinline uint32_t drv_adc_test2_data_read(void)
{
    return (REG_ADC_ADC_TEST2->word);
}


/*
  * @brief  drv_adc_int_test_data_read
  * @param  null
  * @note
  * @retval int test data
*/
__forceinline uint8_t drv_adc_int_test_data_read(void)
{
    return (REG_ADC_INT_TEST->word & 0x01);
}

/*
  * @brief  drv_adc_int_mask_test_data_read
  * @param  null
  * @note
  * @retval int mask test data
*/
__forceinline uint8_t drv_adc_int_mask_test_data_read(void)
{
    return (REG_ADC_INT_MASK_TEST->word & 0x01);
}

#endif